Μέθοδοι συσχεδίασης υλικού/λογισμικού με χρήση scripting γλώσσών

Λογαράς Ευάγγελος

Unit:

Τομέας Υπολογιστικών Συστημάτων και Εφαρμογών
Library of the School of Science

Deposit date:

2015-12-10

Year:

2015

Author:

Λογαράς Ευάγγελος

Dissertation committee:

Ηλίας Μανωλάκος, Αγγελική Αραπογιάννη, Αντώνιος Πασχάλης

Original Title:

Μέθοδοι συσχεδίασης υλικού/λογισμικού με χρήση scripting γλώσσών

Languages:

English

Translated title:

Using scripting languages for hardware/software co-design

Summary:

Embedded System on Chips (SoCs) nowadays include at least one programmable
processor Intellectual Property (IP) core and several other hardware blocks,
attached as custom co-processors or peripheral units to the processor's main
data and control bus. Such a complex architecture can take advantage of the
reconfigurable, fast parallel processing and low power consumption features of
modern FPGA devices. These unique features are limited by the lack of tools for
hw/sw co-design and rapid system prototypingof embedded multi-processor SoCs.

In this thesis we present a new methodology targeting the hw/sw co-design of
multiprocessor embedded SoCs that has been developed by using the strengths of
the popular Python scripting language. We exploit the features of Python to
boost the productivity of processor-centric SoC designs for Field Programmable
Gate Arrays (FPGAs) implementation. In more details we developed methods to:
(a) support hardware descriptions using Python syntax and automatically
generate synthesizable VHDL code. (b) Support Python descriptions for
simulating the behavior of an embedded SoC in algorithmic/functional level or
using Register Transfer Level (RTL) descriptions and generate digital
simulation plots in a bit-true and cycle-accurate manner. (c) Support the use
of C software development tools for the programming of the processor core and
(d) automatically generate scripts (Tcl) to integrate with FPGA implementation
tools and ease synthesis and physical implementation steps.

Three complex SoC's have been designed and implemented in FPGA devices and used
as design cases to demonstrate and assess the new co-design and co-simulation
features along with the supported design flow. All three designs use a
processor IP core as the main programmable system controlleralong with custom
hardware units designed for: a) image processing, b) audio processing and c)
stochastic simulation of biochemical reaction networks. Each multi-processor
SoC design follows the progress that we had in the development of our
methodology and highlights certain features of the tool.

We believe that with our methodology, developed using Python, we cover the lack
of existence of mature tools targeting the hw/sw co-design and prototyping of
FPGA based embedded SoCs.

Keywords:

Digital desing, Embedded systems, Python, SysPy, FPGA

Index:

Yes

Number of index pages:

67-73

Contains images:

Yes

Number of references:

Number of pages:

241

File: