Unit:
Τομέας Ηλεκτρονικής Φυσικής και ΣυστημάτωνLibrary of the School of Science
Supervisors info:
Τσίλης Εμμανουήλ, Επικ. Καθηγητής
Original Title:
Υλοποίηση πρωτοκόλλου συνέπειας κρυφής μνήμης σε σύστημα πολυεπεξεργασίας
Summary:
Current thesis is about implementation of MESI protocol, using VHDL. This
protocol is used by processing systems, including at least two processors, for
the purpose of handling the cache coherence problem. At the first part,
principles and terms are presented to build necessary background regarding the
topic. Next, a detailed description of implemented system architecture is
given. The final part contains functional tests, used for demonstration
purposes and as a base to analyze internal signaling of the system.
Keywords:
MESI, Cache, Memory, Protocol, Processor
Number of index pages:
3-8
File:
File access is restricted only to the intranet of UoA.
document.pdf
1 MB
File access is restricted only to the intranet of UoA.
