Unit:
Κατεύθυνση Ηλεκτρονικός Αυτοματισμός (Η/Α, με πρόσθετη εξειδίκευση στην Πληροφορική και στα πληροφοριακά συστήματα)Library of the School of Science
Author:
Tzimas-Liosatos Georgios
Supervisors info:
Διονύσιος Ρεΐσης, Αναπληρωτής Καθηγητής, Φυσικής, ΕΚΠΑ
Original Title:
Παράλληλη Επεξεργασία Fourier για βάσεις δυνάμεις του 2
Translated title:
Parallel Fourier Computation for power of 2 radices
Summary:
Fast Fourier Transform (FFT) is an algorithm for the efficient computation of Discreate Fourier Transform (DFT).
FFT converts a signal from time domain to a representation in the frequency domain and vice versa, achieving computational complexity of O(N\log{N}), instead of Ο(Ν^2) of the DFT.
This thesis presents an in-place addressing technique with parallel memory accessing without using intermediate stages of storing and loading.
This technique permutes the data tuples at storing, achieving small space complexity for memory and address generation circuit.
It can implements architectures supporting continuous flow of data, for single-radices and mixed-radices.
The resulting architectures, of the addressing technique, were designed in register-transfer level in VHDL, implemented for FPGA and finally they were tested using the appropriate simulation tools.
Main subject category:
Science
Keywords:
Fourier, FFT, VHDL, FPGA
File:
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msc_thesis_tzimas_final.pdf
1 MB
File access is restricted only to the intranet of UoA.