Κατεύθυνση / ειδίκευση Υπολογιστικά Συστήματα: Λογισμικό και Υλικό (ΣΥΣ)
Library of the School of Science

2014-10-21

2014

Μπρατσάκη Φωτεινή-Μαρία
Παπαδημητρίου Γεώργιος

Δημήτρης Γκιζόπουλος Αναπλ. Καθηγητής

Performance Evaluation of an Enhanced x86 Microprocessor Model with Data and Instruction Cache Prefetchers

English

Αξιολόγηση Απόδοσης ενός Εμπλουτισμένου x86 Μοντέλου Μικροεπεξεργαστή με Μηχανισμούς εκ των Προτέρων Προσκόμισης Δεδομένων και Εντολών

Modern microprocessor architectures have shown demonstrable progress in
performance through the last decades. The increase in the rate of
microprocessor clocks extends the computing capabilities but at the same time
they significantly exceed the clock frequency of the main memory. Data and
instruction access penalties become the main performance bottleneck in
high-performance computing and increase processor stall time. Data prefetching
is used in order to improve the memory system throughput. This thesis shows how
prefetching can effectively change the processor performance by modifying the
MARSSx86, a state-of-the-art full system simulator for x86 microprocessors.
More specifically, we integrate a stride prefetcher for first-level data cache
and a sequential prefetcher for first-level instruction cache. The results,
using the SPEC CPU2006 benchmark suite, with and without hardware prefetching
mechanisms, indicate that stride prefetching on a scalar processor can
significantly decrease the cache miss rate of particular programs.

Microarchitectectural simulation, benchmarks, Optimization, Prefetching

Yes

17,19,21

Yes

14

88

File access is restricted.

https://pergamos.lib.uoa.gr/uoa/dl/object/1321329