Unit:
Department of Informatics and TelecommunicationsΠληροφορική
Supervisors info:
Αντώνιος Πασχάλης, Καθηγητής, Πληροφορικής & Τηλεπικοινωνιών, ΕΚΠΑ
Original Title:
Συγγραφή Εκπαιδευτικού Υλικού για το μάθημα του Τμήματος Πληροφορικής & Τηλεπικοινωνιών «Space Data Systems»
Translated title:
Writing of Educational Material for the Course "Space Data Systems" of the Department of Informatics & Telecommunications
Summary:
The purpose of this thesis is the writing of a comprehensive practical guide concerning the design and implementation of a real processor of the ARM family in FPGA using the Xilinx Vivado IDE design tool. The thesis is split into two parts:
1. The first part, which is by far the most extensive, is a tutorial of the Vivado design tool through two simple but representative digital circuits (one involving an adder and some registers and the other an FSM). For each digital circuit, it is described its coding style in VHDL, its synthesis and implementation processes and also the processes of the logical and timing simulations in every stage of the design.
2. The second part discusses the design requirements of a single cycle processor of the ARM family. For educational reasons, the supported instruction set is limited, but is enough so that the processor can be used in a wide range of applications.
The practical guide also contains a large number of screenshots taken from the design environment that display all the steps described in the text. This way, the student who studies it is fully aware of every stage of the design process.
Main subject category:
Science
Keywords:
VHDL, Xilinx, Vivado, Hardware Design, Education
Number of index pages:
13
