Unit:
Department of Informatics and TelecommunicationsΠληροφορική
Author:
CHASIALIS KONSTANTINOS
Supervisors info:
Δημήτρης Γκιζόπουλος, Καθηγητής, Τμήμα Πληροφορικής και Τηλεπικοινωνιών, Εθνικό και Καποδιστριακό Πανεπιστήμιο Αθηνών
Original Title:
EDUCATIONAL SIMULATION FRAMEWORK FOR PERFORMANCE MODELING OF RISC MICROPROCESSORS
Translated title:
EDUCATIONAL SIMULATION FRAMEWORK FOR PERFORMANCE MODELING OF RISC MICROPROCESSORS
Summary:
One of the most fundamental topics in the field of Computer Science is how hardware works and how it interacts with software in contemporary computing systems. Unfortunately, this topic is hard to understand because students are not able to visualize/simulate and experiment with what they are taught. For that reason, many programs have been developed and their goal is to visualize what happens in the hardware when a program is being executed.
Another equally significant topic is about assembly languages. MIPS as RISC ISA is usually the MIPS assembly language that is taught in universities. The main reason that MIPS is used is that assembly languages are very complex, counter-intuitive and difficult to understand while MIPS is simple enough to understand yet complicated enough to teach all the basic points. Additionally, MIPS processors continue to be used in workstations, embedded systems (e.g. routers, set-top boxes, cable modems etc.) and even supercomputers.
In this thesis we turn our attention to a widely used project, QtMips. QtMips is a visual educational simulator that uses MIPS RISC ISA and simulates many hardware components during a program execution. We will showcase how it works, which hardware components it simulates and we will add useful extensions to this program by providing simulation for more complex hardware components like branch predictor. Finally, in collaboration with a team from Czech Technical University in Prague, we will develop a more advanced version of this program that uses a modern architecture/instruction set RISC-V.
Main subject category:
Technology - Computer science
Keywords:
Assembly, RISC, MIPS, RISC-V, Instruction Set, CPU, DRAM, SRAM, CPU, ALU, FPU, Pipeline, Branch Predictors, Cache, Memory, Microprocessors, Performance Modeling, Simulation
