Conflict-free parallel memory accessing techniques for FFT architectures

Επιστημονική δημοσίευση - Άρθρο Περιοδικού uoadl:3037238 25 Αναγνώσεις

Μονάδα:
Ερευνητικό υλικό ΕΚΠΑ
Τίτλος:
Conflict-free parallel memory accessing techniques for FFT architectures
Γλώσσες Τεκμηρίου:
Αγγλικά
Περίληψη:
Speeding up fast Fourier transform (FFT) computations is critical for today's real-time systems targeting signal processing and telecommunication applications. Aiming at the performance improvement and the efficiency of FFT architectures, this paper presents an address generation technique which enables a radix-b processor to access in parallel b memory banks without conflicts during each stage's computations. Using kb memory banks at each stage leads to increasing the speedup of the algorithm by a factor of kb. The address generation can be realized in each radix-b stage by the use of lookup tables of size O(kb2) bits. The proposed technique is cost efficient and leads to the design of FFT architectures of high speedup and high sustained throughput. © 2008 IEEE.
Έτος δημοσίευσης:
2008
Συγγραφείς:
Reisis, D.
Vlassopoulos, N.
Περιοδικό:
IEEE Transactions on Circuits and Systems I: Regular Papers
Εκδότης:
Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Τόμος:
55
Αριθμός / τεύχος:
11
Σελίδες:
3438-3447
Λέξεις-κλειδιά:
Fast Fourier transforms; Interactive computer systems; Memory architecture; Real time systems; Signal processing; Table lookup, Address generation; B stages; Conflict free; IS costs; Memory banks; Parallel memory; Telecommunication applications, Parallel architectures
Επίσημο URL (Εκδότης):
DOI:
10.1109/TCSI.2008.924889
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