Acceleration techniques and evaluation on multi-core CPU, GPU and FPGA for image processing and super-resolution

Επιστημονική δημοσίευση - Άρθρο Περιοδικού uoadl:3070896 10 Αναγνώσεις

Μονάδα:
Ερευνητικό υλικό ΕΚΠΑ
Τίτλος:
Acceleration techniques and evaluation on multi-core CPU, GPU and FPGA for image processing and super-resolution
Γλώσσες Τεκμηρίου:
Αγγλικά
Περίληψη:
Super-resolution (SR) techniques constitute a key element in image applications, which need high-resolution reconstruction, while in the worst case, only a single low-resolution observation is available. SR techniques involve computationally demanding processes, and thus, researchers are currently focusing on SR performance acceleration. Aiming at improving the SR performance, the current paper builds up on the characteristics of the L-SEABI SR method to introduce parallelization techniques for GPUs and FPGAs. The proposed techniques accelerate GPU reconstruction of ultra-high definition content, by achieving three (3×) times faster than the real-time performance on mid-range and previous generation devices and at least nine times (9×) faster than the real-time performance on high-end GPUs. The FPGA design leads to a scalable architecture performing four (4×) times faster than the real-time on low-end Xilinx Virtex 5 devices and 69 times (69×) faster than the real-time on the Virtex 2000t. Moreover, we confirm the benefits of the proposed acceleration techniques by employing them on a different category of image processing algorithms: on window-based disparity functions, for which the proposed GPU technique shows an improvement over the CPU performance ranging from 14 times (14×) to 64 times (64×), while the proposed FPGA architecture provides 29× acceleration. © 2016, Springer-Verlag Berlin Heidelberg.
Έτος δημοσίευσης:
2019
Συγγραφείς:
Georgis, G.
Lentaris, G.
Reisis, D.
Περιοδικό:
Journal of Real-Time Image Processing
Εκδότης:
Springer-Verlag
Τόμος:
16
Αριθμός / τεύχος:
4
Σελίδες:
1207-1234
Λέξεις-κλειδιά:
Computer graphics; Computer graphics equipment; Field programmable gate arrays (FPGA); Image enhancement; Optical resolving power; Program processors; Signal receivers, Acceleration technique; High-resolution reconstruction; Image processing algorithm; Parallelization techniques; Performance acceleration; Power performance; Real-time image processing; Super resolution, Graphics processing unit
Επίσημο URL (Εκδότης):
DOI:
10.1007/s11554-016-0619-6
Το ψηφιακό υλικό του τεκμηρίου δεν είναι διαθέσιμο.