Τίτλος:
A Co-Design Approach For Rapid Prototyping Of Image Processing On SoC
FPGAs
Γλώσσες Τεκμηρίου:
Αγγλικά
Περίληψη:
Achieving real-time performance in image processing with embedded
devices poses a very challenging task due to the computationally and
memory intensive nature of the algorithms. The FPGA platforms provide
very attractive solutions in such applications, because they support
highly parallel processing with low power consumption. In this paper we
present an approach to increase productivity when developing real-time
image processing algorithms on SoC FPGA devices. Our approach is
centered around the fast communication of the HW and SW components and
the use of an open-source operating system hosted on the existing
embedded processor. Based on this approach we decrease time-to-market
while at the same time we avoid hindering the real-time operation of the
system. To demonstrate the capabilities of the proposed system, as a
proof of concept, we use the well known Harris detection algorithm and
the Xilinx Zynq XC7Z020 FPGA device. We present an in-depth performance
analysis regarding the resource utilization of the FPGA, the operation
frequency, the communication overhead and the power consumption.
Συγγραφείς:
Stratakos, Ioannis
Reisis, Dionysios
Lentaris, George and
Maragos, Konstantinos
Soudris, Dimitrios
Εκδότης:
ASSOCIATION FOR COMPUTING MACHINERY
Τίτλος συνεδρίου:
20TH PAN-HELLENIC CONFERENCE ON INFORMATICS (PCI 2016)
Λέξεις-κλειδιά:
Field programmable gate arrays; System-on-chip; Image processing; Harris
Detector; Zynq
DOI:
10.1145/3003733.3003797
